H.264 DECODER DESIGN USING VERILOG (With Simulation Results)

The H.264/AVC is the most recent standard of video compression/decompression for future broadband network. This standard was developed through the Joint Video Team (JVT) from the ITU-T Video Coding Experts Group and the ISO/IEC MPEG standardization committee. In this project H.264 decoder functional block such as Context based Binary arithmetic coding (CABAC), Inverse Quantization and Inverse Discrete Cosine Transform are designed using Verilog. CABAC includes three basic building blocks of context modeling, binary arithmetic coding and Inverse binarization. Here the compressed bit-stream from NAL unit is expanded by CABAC module to generate various syntax elements. Here the basic arithmetic decoding circuit units are designed to share efficiently by all syntax elements. Inverse Quantization and Inverse Discrete Cosine Transform functional blocks are used to reconstruct the original image pixels values